1. Technical Field
This disclosure generally relates to computer hardware testing and development, and more specifically relates to a system and method for efficient validation of transactional memory in a computer processor.
2. Background Art
Processor testing tools attempt to generate the most stressful test case for a processor. In theory, the generated test cases should provide maximum test coverage and should be able to stress various timing scenarios on the processor, including the memory. Building test cases can be extremely costly in time and resources such that building efficient test cases is an important part of processor testing.
Transactional memory is used to simplify concurrent programming by allowing a group of load and store instructions to execute in an atomic way. A transactional memory system transparently supports the definition of regions of code that are considered a transaction. Transactional memory may be supported in hardware or software. A processor that supports hardware transactional memory needs to be tested and validated at the device level to insure the processor's hardware properly handles transactional memory operations including checkpoint of the pre-transaction state and restoring the state of the processor in case of failure or any other abort of the transaction.